REALM: A Loop Memory Access Optimization Technique with Loop-Carried Data Dependence Analysis for DSP Applications

Reducing memory accesses is particularly important for DSP applications since they are widely used in embedded systems and need to be executed with high performance and low power consumption. In this paper, we focus on optimizing loops which are the most critical sections for DSP applications. We propose a machineindependent intermediate-code-level loop memory access optimization technique, REALM (REdundAnt Load Exploration & Migration), to explore hidden redundant loads and migrate them outside loops based on loopcarried data dependence analysis. In REALM, we first build up a data-flow graph to describe the inter-iteration data dependencies among memory operations. Then we perform code transformation by exploiting these dependencies with registers to hold the values of unnecessary loads and migrating these loads outside loops. Different from the previous work based on data-flow-analysis, our data-flow-graph-based approach is easy to be implemented and more suitable for optimizing loop kernels of DSP applications that have simple control-flow structure. We implement our technique into the IMPACT compiler [24] and conduct experiments using a set of benchmarks from DSPstone [28] on the cycle-accurate VLIW simulator of Trimaran [1]. The experimental results show that our technique significantly reduces the number of memory accesses.